KR100682266B1 - Differential output tspc d-type flip flop and frequency divider using it - Google Patents
digital logic - D flip flop with asynchronous reset circuit design - Electrical Engineering Stack Exchange
Schematic of standard CML master-slave D-flip flop. | Download Scientific Diagram
PDF) Resonant Tunneling Diode/HBT D-Flip Flop ICs Using Current Mode Logic-Type Monostable-Bistable Transition Logic Element with Complementary Outputs | Taeho Kim - Academia.edu
Part 01: Proposal and Overview. Dual Modulus Prescaler Using Current Mode Logic Goals 2.5 GHz Operation 8/9 Dual Modulus 0.18uM BSIM 3 Model. - ppt download
An improved current mode logic latch for high‐speed applications - Kumawat - 2020 - International Journal of Communication Systems - Wiley Online Library
Circuit configuration of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
adding reset function to D Flip FLOP | Forum for Electronics
High Speed Digital Blocks
NB7V52M - D Flip Flop, 1.8 V / 2.5 V Differential, with Reset and CML Outputs
The operation explanation of the D-type flip-flop
MC74VHC74 datasheet - Dual D Flip-Flop with Set and Reset. The MC74VHC74
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adding reset function to D Flip FLOP | Forum for Electronics
adding reset function to D Flip FLOP | Forum for Electronics
DFF-based CMOS clock divider. | Download Scientific Diagram
RTD-based High Speed and Low Power Integrated Circuits RTD-based High Speed and Low Power Integrated Circuits
NB7V52M Flip-Flop Datasheet pdf - D Flip-Flop. Equivalent, Catalog
Figure 5.21 from Cmos Logic and Current Mode Logic 5.1 Introduction | Semantic Scholar
KR100682266B1 - Differential output tspc d-type flip flop and frequency divider using it - Google Patents
adding reset function to D Flip FLOP | Forum for Electronics
Edge Triggered D Flip-Flop with Asynchronous Set and Reset Tutorial
